Recently, as a new memory device, a nonvolatile semiconductor memory device called ReRAM (Resistance Random Access Memory) is noted. The ReRAM uses a resistance memory element which has a plurality of resistance states of different resistance values, which are changed by electric stimulations applied from the outside and whose high resistance state and low resistance state are corresponded to, e.g., information “0” and “1” to be used as a memory element. The ReRAM highly potentially has high speed, large capacities, low electric power consumption, etc. and is considered prospective.
The resistance memory element has a resistance memory material whose resistance states are changed by the application of voltages sandwiched between a pair of electrodes. As the typical resistance memory material, oxide materials containing transition metals are known.
FIG. 16 illustrates the electric characteristics of the resistance memory element. As illustrated in FIG. 9, as a voltage are applied increasingly to the resistance memory element in the high resistance state, the resistance value abruptly decreases when the voltage exceeds a certain value (set voltage Vset), and the resistance memory element transits to the low resistance state. This operation is generally called “set”. On the other hand, a voltage is gradually applied to the resistance memory element in the low resistance state, the resistance value abruptly increases when the voltage exceeds a certain value (reset voltage Vreset), and the resistance memory element transits to the high resistance state. This operation is generally called “reset”.
These operations make it possible to control the resistance state of the resistance memory element by simply applying voltages to the resistance memory element. Data can be read by measuring the value of a current flowing in the element when a voltage which does not cause the reset is applied to the element.
The following are examples of related art of the present invention: Japanese Laid-open Patent Publication No. 2005-025914, and I. G. Back et al., “Highly scalable non-volatile resistance memory using simple binary oxide driven by asymmetric unipolar voltage pulses”, Tech. Digest IEDM 2004, p. 587.
However, in the method of simply applying a voltage to the resistance memory element to thereby reset the resistance memory element from the low resistance state to the high resistance state, due to the resistance value increase accompanying the resistance state change from the high resistance state to the low resistance state, an excessive voltage which exceeds the reset voltage is applied to the resistance memory element immediately after reset. When this voltage is higher than the set voltage, the resistance memory element transits from the high resistance state again to the low resistance state, which makes it impossible to make normal write operation.
When the resistance memory element is set from the high resistance state to the low resistance state, excessive current flows in the resistance memory element due to the abrupt resistance value decrease due to the resistance state change from the high resistance state to the low resistance state. Accordingly, for the set operation, it is essential to limit the current so as to prevent the breakage of the select transistor, the resistance memory element, etc.
Generally, the resistance memory elements have large fluctuations and changes of the device characteristics and tend to have small write margins. Especially, in the reset operation, where the write voltage is low, the fluctuations and changes of the device characteristics largely influence the write operation. Accordingly, especially in a device including memory cell array, some measures and methods for the write process are necessary against fluctuations and changes of the device characteristics.